A reconfigurable CT Σ Δ modulator with two modes for wireless applications

This paper presents the design of a two-mode CT(continuous time) ∑-Δ modulator for broadband wireless communication applications. The architecture of modulator consists of a single-loop fourth-order feedback structure loop filter and a 4-bit quantizer, which can support two modes of 100/50 MHz. The system design and simulation results of the modulator are shown in the article through Simulink; it also contains most circuit non-ideal factors. The simulation results provide feasibility for the circuit design. In the circuit-level design, a three-stage feedforward amplifier is used for the operational amplifier, which can ensure high bandwidth while achieving high gain. The mode switching of the bandwidth is selected through a frequency divider, requiring only one clock signal input, which greatly reduces the complexity of the design. Finally, the circuit level simulation of the designed modulator is carried out to obtain the results, and the SNDR is 68.4 dB and 76.2 dB for 100 and 50 MHz channel bandwidths, respectively, indicating that this design can be applied to wireless communication systems.

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Publication Details

Published
2025-07-18
DOI
https://doi.org/10.1117/12.3070913
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
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article

A reconfigurable CT Σ Δ modulator with two modes for wireless applications

Xiaochang Xu, Xunping Hou, Menghao Wang, Weiming Li
Analog and Mixed-Signal Circuit Design
article

A reconfigurable CT Σ Δ modulator with two modes for wireless applications

Xiaochang Xu, Xunping Hou, Menghao Wang, Weiming Li
article en

Abstract

This paper presents the design of a two-mode CT(continuous time) ∑-Δ modulator for broadband wireless communication applications. The architecture of modulator consists of a single-loop fourth-order feedback structure loop filter and a 4-bit quantizer, which can support two modes of 100/50 MHz. The system design and simulation results of the modulator are shown in the article through Simulink; it also contains most circuit non-ideal factors. The simulation results provide feasibility for the circuit design. In the circuit-level design, a three-stage feedforward amplifier is used for the operational amplifier, which can ensure high bandwidth while achieving high gain. The mode switching of the bandwidth is selected through a frequency divider, requiring only one clock signal input, which greatly reduces the complexity of the design. Finally, the circuit level simulation of the designed modulator is carried out to obtain the results, and the SNDR is 68.4 dB and 76.2 dB for 100 and 50 MHz channel bandwidths, respectively, indicating that this design can be applied to wireless communication systems.

Beijing Microelectronics Technology Institute (CN)
Affordable and clean energy
Openalex Percentile: Top 82%
Analog and Mixed-Signal Circuit Design
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