224 Tops/W-Level Analog Computation in Memory Cell Using Hybrid Ferroelectric Tunnel Junction Having Enhanced on-State Conductance

Here, we demonstrate hybrid ferroelectric tunnel junctions (H-FTJs) that combine ferroelectric and resistive switching for analog computation in memory. The key of H-FTJs lies in the modulation of the effective tunneling thickness by the control of oxygen vacancy-based unconnected filaments in <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{HfZrO}_{2}$</tex>. The H-FTJs exhibited high on-state conductance <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\left(1.6 \times 10^{3}\right. \mathrm{S} / \text{cm}^{2}$</tex>) and on/off ratios <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$(32,000)$</tex> compared to recent studies on <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{HfZrO}_{2}$</tex>-based FTJs. We also fully integrated one-transistor-one-(H-FTJ) cross-bar arrays, and confirmed their analog multiply-accumulate operations (accuracy 91.9%) with high energy efficiency (224.4 TOPS/W) for inference tasks.