A 94.4dB-SNDR 500kHz-BW Multi-Rate MASH 0-1-0 ADC with Easy-to-Drive Capacitive Input and Deadband-Embedded Gm-C Loop Filter

This work proposes a multi-rate MASH 0-1-0 ADC consisting of an 8b oversampled SAR ADC, a 1b incremental CTDSM, and a 12b Nyquist SAR ADC to achieve high SQNR with high efficiency. A coupling capacitive input network is introduced to ease the ADC driving. A high linearity <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{G}_{\mathrm{m}}-\mathrm{C}$</tex> integrator adopting low-noise deadband operation is used for high efficiency and high SNR. The prototype ADC achieves 94.4 dB SNDR over a 500 kHz bandwidth, consuming only 793 uW of power, and resulting in a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{FoMs}_{\mathrm{s}}$</tex> of 182.3 dB.