BEOL Interconnects for 2nm Technology Node and Beyond

We present novel back-end-of-line (BEOL) copper interconnect integration for advanced technology nodes using low-k dielectric dep, binary liner metal gapfill process, radical assisted annealing, chemical mechanical planarization (CMP) and selective metal cap. Unit process and metrology data, electrical tests, Time Dependent Dielectric Breakdown (TDDB) reliability, Electromigration (EM) reliability and circuit simulations confirm significant power-performance-area (PPA) gains for 2nm technology node and beyond.

Authors

Institutions

Publication Details

Published
2025-06-08
DOI
https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11075093
Primary Topic
Semiconductor materials and devices
Type
article
Field-Weighted Citation Impact
0.00
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

BEOL Interconnects for 2nm Technology Node and Beyond

Shashank Sharma, Luca Larcher, Guangzhi Qu, Shi You et al.
3 links
Semiconductor materials and devices
article

BEOL Interconnects for 2nm Technology Node and Beyond

Shashank Sharma, Luca Larcher, Guangzhi Qu, Shi You, Ben Ng, Max Gage, Roey Shaviv, Enrico Piccinini, Keyvan Kashefizadeh, Jianshe Tang, Zhebo Chen, Andy Y. H. Lo, Zhiyuan Wu, Hussam Amrouch, Sree Kesapragada, Gaurav Thareja, Chi-I Lang, Albi Mema, Munehiro Tada, Andrea Palmieri, Davide Cornigli, Shankar Muthukrishnan, Michael Haverty, Xingye Wang, Sameer Deshpande, Alexander Jansen, Takahisa Tanaka, Li Qun Xia, Jaehyun Lee, Ren He, Bo Xie, F. Nardi, Yanping Wu, Nicola Giuliani, Brian J. Brown, Monika Jamieson, Norman Tam, Xianmin Tang, Mehul Naik, Swetha Barkam, Mathew Spuller, Francis Kanyiri Mungai, Maarten Berkens
article en

Abstract

We present novel back-end-of-line (BEOL) copper interconnect integration for advanced technology nodes using low-k dielectric dep, binary liner metal gapfill process, radical assisted annealing, chemical mechanical planarization (CMP) and selective metal cap. Unit process and metrology data, electrical tests, Time Dependent Dielectric Breakdown (TDDB) reliability, Electromigration (EM) reliability and circuit simulations confirm significant power-performance-area (PPA) gains for 2nm technology node and beyond.

Applied Materials (United States) (US), Keio University (JP), Technical University of Munich (DE)
Openalex Percentile: Top 82%
Semiconductor materials and devices
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.