A 142Mw 6.4Gbps Massive MU-MIMO RSMA Detector for Next-Generation Communication Systems

This work presents the first rate-splitting multiple access (RSMA) detector for massive multiuser multi-input, multioutput (MU-MIMO) systems. The proposed detector supports <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$256 \times 32$</tex> MIMO configuration with up to 256-QAM modulation. A polar decoder with a code length of 128 bits is included for error correction. The iterative detection architecture reduces the latency by 98 %. The chip achieves a maximal throughput of 6.4 Gbps with 142 mW power at 200 MHz. Compared to the state-of-the-art space-division multiple access (SDMA) detectors, this work achieves 3.3 -to- <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3.6 \times$</tex> higher throughput and 2.0 -to- <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$4.5 \times$</tex> higher energy efficiency, in addition to the better error performance in correlated channels.