A Monolithic Dual-Layer Pixel Design with BEOL IGZO Transistors Featuring High Dual Conversion Gain Ratio and Scaled Pixel Size for Future Image Sensors

A novel monolithic dual-layer pixel design based on BEOL InGaZnO (IGZO) transistors (Tr) is proposed. By moving the pixel Trs to BEOL, the proposed design enables the double pixel size scaling down to 0.5 um and also a large dual conversion gain (DCG) ratio <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\sim 10: 1$</tex> due to reduced parasitic capacitance and large Tr area. Device reliability and noise performance of IGZO Trs for pixel applications were studied comprehensively. Remarkable positive bias temperature instability (PBTI) with <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathrm{V}_{\text{TH}}$</tex> shift within 30 mV after 1 ks stress under gate fields of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2-6 \text{MV} / \text{cm}$</tex> and temperatures of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$25-95^{\circ} \mathrm{C}$</tex> is achieved for IGZO Trs with <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\text{Lg}=65 \text{nm}$</tex>. Low 1/f noise, 10 times lower than reported short-channel IGZO Trs and comparable to Si Trs at 45 nm node, is also demonstrated for the scaled IGZO Trs. Our results open up opportunities for future image sensors based on BEOL IGZO technology.