Driving Innovation in DRAM Technology — Towards a Sustainable Future

Since the introduction of the 6F2 Buried Gate Scheme in the early 2010s, DRAM technology has been continuously scaled down to 10nm class technology. Beyond 10nm, however, the evolution of DRAM technology has reached an inflection point where it is difficult to build scalable platforms using existing cell schemes and necessary to change DRAM cell schemes. In response to the inflection point, this paper will review how cell schemes will change to ensure a scalable platform and can innovate in a way that delivers value of DRAM in the future.