Power Delivery for Scaled-Out Chiplet-Based Wafer-Scale Systems with $8{\mu}\mathrm{m}$ Cu-Cu Bond Pitch on Active SI-Interconnect Fabric Substrate

Wafer-Scale chiplet-based systems allow for condensing an entire data center rack into a single advanced substrate. However, power delivery and thermal management remain challenging. We demonstrate a heterogeneously integrated voltage converter partitioned into two parts – a local utility chiplet and an active Silicon-Interconnect Fabric (Si-IF) substrate for large chiplet-based systems with a power density of 562 W/cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">3</sup>, and a two-phase cooling thermal solution. These advances can be applied to a variety of power and thermal architectures for wafer-scale systems, paving the way for the development of high-performance computing (HPC) and large language model (LLM) applications that overcome the limitations of interposer and 3D packaging technologies.