A 6.2mm<sup>2</sup> 56.6Gbps 18.2pJ/b oFEC Decoder for Optical Communications
A complete 5-core iteration-unfolded open forward error correction (oFEC) decoder is presented. The <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$6.2 \text{mm}^{2}$</tex> decoder adopts a bit-level parallel architecture with transpose reordering to achieve 56.6 Gbps at <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$18.2 \text{pJ} / \mathrm{b}$</tex>, surpassing the state-of-the-art by 2.8 x in throughput, 4.8 x in energy efficiency, and <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$6.5 x$</tex> in area efficiency. An efficient list-64 decoding enhances error correction with a pre-FEC BER of up to 2 %.
Authors
- Zhengya Zhang (ORCID: https://orcid.org/0000-0001-5963-9018)
- Wei Tang (ORCID: https://orcid.org/0000-0001-8613-4285)
- Cheng‐Hsun Lu (ORCID: https://orcid.org/0000-0002-4794-9438)
Institutions
- University of Michigan (US)
Publication Details
- Published
- 2025-06-08
- DOI
- https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11075198
- Primary Topic
- Optical Network Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Semiconductor Research Corporation