Dial: An Energy-Efficient Dram in-Memory Computing Accelerator with Compact Partial Product Lut and Twisted Differential Adc

This paper presents DIAL, an energy-efficient DRAM inmemory computing accelerator with partial product LUTbased architecture for advanced tasks. The compact LUT reduces 53% of the LUT area and 45% of power by eliminating extended zeros. The twisted differential ADC reduces ADC area by 37 % and power by 45 % through comparators sharing and improves CSNR by using a 2.3fF computation capacitor and increasing ADC resolution by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3 \times$</tex>. The dual-mode sense amplifier reduces 33% of LUT power by adjusting operation modes based on data patterns. Fabricated in 28 nm CMOS technology, DIAL occupies a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$20.25 \text{mm}^{2}$</tex> die area and achieves 55.4 TFLOPS/W energy efficiency on the GPT-2 benchmark, demonstrating a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$4.1 \times$</tex> higher efficiency than prior IMC designs.