A 10W 3.8-5V Input IVR Chiplet with 93%-Peak-Efficiency and 3.2A/mm2 Density Featuring Wide Load Range and Adaptive Ganging for 2.5D/3D Vertical Power Delivery

A monolithic Flying Capacitor Integrated Voltage Regulator (FCIVR) chiplet is proposed to supply wide load range while incorporating adaptive ganging capabilities for <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2.5 \mathrm{D} / 3 \mathrm{D}{-}$</tex> ICs. It offers four ganging modes catering to scalable PDNs. The triple-loop regulation enables twodimensional V-F droop saving for drastic di/dt events and provides autonomous handshake driving for efficient conversion. By leveraging ML-driven circuit & RDL physical optimization, combined with ultra-thin interposer integration to minimize form factor and parasitics, the proposed VPD technology achieves 10 A max current, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3.2 ~\mathrm{A} / \text{mm}^{2}$</tex> density, 93 % peak efficiency and 32 ns FoM.

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Publication Details

Published
2025-06-08
DOI
https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11074928
Primary Topic
Interconnection Networks and Systems
Type
article
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article

A 10W 3.8-5V Input IVR Chiplet with 93%-Peak-Efficiency and 3.2A/mm2 Density Featuring Wide Load Range and Adaptive Ganging for 2.5D/3D Vertical Power Delivery

Yan Wang, Xiaosen Liu, Junmin Jiang, Xichen Sun et al.
Interconnection Networks and Systems
article

A 10W 3.8-5V Input IVR Chiplet with 93%-Peak-Efficiency and 3.2A/mm2 Density Featuring Wide Load Range and Adaptive Ganging for 2.5D/3D Vertical Power Delivery

Yan Wang, Xiaosen Liu, Junmin Jiang, Xichen Sun, Rui Chen, Xuliang Wang, Xuchen Men
article en

Abstract

A monolithic Flying Capacitor Integrated Voltage Regulator (FCIVR) chiplet is proposed to supply wide load range while incorporating adaptive ganging capabilities for <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2.5 \mathrm{D} / 3 \mathrm{D}{-}$</tex> ICs. It offers four ganging modes catering to scalable PDNs. The triple-loop regulation enables twodimensional V-F droop saving for drastic di/dt events and provides autonomous handshake driving for efficient conversion. By leveraging ML-driven circuit & RDL physical optimization, combined with ultra-thin interposer integration to minimize form factor and parasitics, the proposed VPD technology achieves 10 A max current, <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$3.2 ~\mathrm{A} / \text{mm}^{2}$</tex> density, 93 % peak efficiency and 32 ns FoM.

Southern University of Science and Technology (CN), Tsinghua University (CN)
Affordable and clean energy
Openalex Percentile: Top 78%
Interconnection Networks and Systems
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A 10W 3.8-5V Input IVR Chiplet with 93%-Peak-Efficiency and 3.2A/mm2 Density Featuring Wide Load Range and Adaptive Ganging for 2.5D/3D Vertical Power Delivery — Yan Wang, Xiaosen Liu, et al. · (2025) | TGRS Research Map | TGRS