A 37.8Mb/mm<sup>2</sup> Sram in Intel 18A Technology Featuring a Resistive Supply-Line Write Scheme and Write-Assist with Parallel Boost Injection
A high-density, SRAM-based Register File (RF) has been demonstrated in Intel 18A Technology [1] featuring RibbonFET GAA transistors and a Back Side Power Delivery Network (BSDPN). The RF is optimized for high density and array efficiency and achieves a density of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$37.8 \text{Mb} / \text{mm}^{2}$</tex>, the highest density reported to date for an RF. It is implemented with a conventional Bitline (BL), two-bank memory architecture and it can be used as the SRAM workhorse for most SoC applications with maximum bit-count of 262 Kb.
Authors
- K. Chawla
- J. Prasanth Kumar (ORCID: https://orcid.org/0000-0003-0847-465X)
- Harold Pilo (ORCID: https://orcid.org/0009-0002-6782-965X)
- Manish Arora (ORCID: https://orcid.org/0000-0002-3350-4657)
- Jianjun Jia
- Anurag Garg (ORCID: https://orcid.org/0000-0002-5915-3496)
- Chien-An Lai (ORCID: https://orcid.org/0009-0005-4384-4777)
- Zack Lo
Institutions
- Synopsys (Switzerland) (CH)
- Synopsys (United States) (US)
Publication Details
- Published
- 2025-06-08
- DOI
- https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11074884
- Citations
- 1
- Primary Topic
- Semiconductor materials and devices
- Type
- article
- Field-Weighted Citation Impact
- 0.73