A 4GHz 2b 5<sup>th</sup> Order Continuous-Time $\boldsymbol{\Delta} \boldsymbol{\Sigma}$ Modulator with –100.1dBc THD and 122DBFS SFDR in 100MHz BW

This work presents a continuous-time <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \Sigma$</tex> modulator (CTDSM) with a novel <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5^{\text {th }}$</tex> order noise transfer function (NTF) that increases in-band SQNR by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\sim 9.5 ~\text{dB}$</tex> compared to conventional NTFs. This allows its sampling frequency to be reduced, enabling the use of a 2b SAR quantizer, which dissipates less power than a conventional <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2 b$</tex> flash quantizer and does not require power-hungry digital offset calibration. Furthermore, its <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1^{\text {st }}$</tex> integrator is based on a single energyefficient inverter, whose limited DC gain is absorbed by the rest of the loop filter. While sampling at 4 GHz, the resulting CTDSM achieves -100.1 dBc THD, 74.5 dB SNDR over a 100 MHz BW and consumes 49.5 mW. This results in 5.6 dB higher energy-efficiency than CTDSMs with similar BW and linearity.

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Published
2025-06-08
DOI
https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11074991
Citations
1
Primary Topic
Analog and Mixed-Signal Circuit Design
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article
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article

A 4GHz 2b 5th Order Continuous-Time $\boldsymbol{\Delta} \boldsymbol{\Sigma}$ Modulator with –100.1dBc THD and 122DBFS SFDR in 100MHz BW

Muhammed Bolatkale, Kofi A. A. Makinwa, Lucien J. Breems, Sundeep Javvaji et al.
1 citations
Analog and Mixed-Signal Circuit Design
0.67
article

A 4GHz 2b 5th Order Continuous-Time $\boldsymbol{\Delta} \boldsymbol{\Sigma}$ Modulator with –100.1dBc THD and 122DBFS SFDR in 100MHz BW

Muhammed Bolatkale, Kofi A. A. Makinwa, Lucien J. Breems, Sundeep Javvaji, Shagun Bajoria, Robert J. Rutten
article en
1 citations

Abstract

This work presents a continuous-time <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\Delta \Sigma$</tex> modulator (CTDSM) with a novel <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$5^{\text {th }}$</tex> order noise transfer function (NTF) that increases in-band SQNR by <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\sim 9.5 ~\text{dB}$</tex> compared to conventional NTFs. This allows its sampling frequency to be reduced, enabling the use of a 2b SAR quantizer, which dissipates less power than a conventional <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2 b$</tex> flash quantizer and does not require power-hungry digital offset calibration. Furthermore, its <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$1^{\text {st }}$</tex> integrator is based on a single energyefficient inverter, whose limited DC gain is absorbed by the rest of the loop filter. While sampling at 4 GHz, the resulting CTDSM achieves -100.1 dBc THD, 74.5 dB SNDR over a 100 MHz BW and consumes 49.5 mW. This results in 5.6 dB higher energy-efficiency than CTDSMs with similar BW and linearity.

NXP (Netherlands) (NL), Delft University of Technology (NL)
Openalex Percentile: Top 28%
Analog and Mixed-Signal Circuit Design
0.67
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A 4GHz 2b 5<sup>th</sup> Order Continuous-Time $\boldsymbol{\Delta} \boldsymbol{\Sigma}$ Modulator with –100.1dBc THD and 122DBFS SFDR in 100MHz BW — Muhammed Bolatkale, Kofi A. A. Makinwa, et al. · (2025) | TGRS Research Map | TGRS