A 28nm 84.9KOPS 1.82µJ/op RISC-V Crypto-SoC with Primitive-Based Deep-Coupling Unified Post-Quantum Engine

This paper presents the first RISC-V cryptographic System-on-Chip (SoC) that supports the latest NIST-released Federal Information Processing Standards (FIPS) for post-quantum cryptographic (PQC). It has three key features: 1) RV-dedicated deep-coupling post-quantum engine with dual-rail parallel scheduling. 2) Vectorized instruction-driven computational workflow. 3) Primitive-based fine-grained operator design for multi-scheme reconstruction. The proposed crypto-SoC achieves a throughput of 84.9KOPS and an energy efficiency of 1.82µJ/op in 28nm, demonstrating 1.22-5.84x and 2.41-4.68x improvements in throughput and energy efficiency, respectively, compared to the state-of-the-art design.