A Recall-free 3D Stackable nvDRAM Built Upon Gate-Controlled Thyristor
We introduce a novel and compact gate-controlled thyristor (GCT) based 3D stackable non-volatile DRAM (nvDRAM) that features recall-free operation. Unlike typical nvDRAM, which relies on separate SONOS cells for NVM operation, our design incorporates an ONO charge trapping layer within the gate dielectric of the central main gate in a three-word line (3-WL) GCT architecture. This innovation enables the “store” in nvDRAM to be carried out through self-boosting. Thanks to the unique properties of GCT, which integrates NVM and DRAM components within the same device, the “store” effectively serves as the “recall”, eliminating the need for an additional “recall”. This results in faster boot times and reduced power consumption during startup. This novel nvDRAM holds significant potential to achieve rapid data backup and boot-up, positioning it as a promising alternative to persistent memory.
Authors
- Wei-Chen Chen
- Chih-Yuan Lu (ORCID: https://orcid.org/0000-0002-8951-2509)
- Keh-Chung Wang
- Hang-Ting Lue
- Yu-Tang Lin
Institutions
- Macronix International (Taiwan) (TW)
Publication Details
- Published
- 2025-06-08
- DOI
- https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11075145
- Citations
- 1
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.73