A 22nm 25.08TOPS/W Multi-Task Transformer Accelerator with Mixed Precision Structured Sparsity and Two-Stage Task-Adaptive Power Management
This paper presents the first silicon implementation of a transformer accelerator that executes multiple tasks simultaneously, improving per-task efficiency. It applies structured sparsity, multi-precision computation, and a two stage DVFS mechanism yielding highest reported efficiency per task.
Authors
- Dennis Sylvester (ORCID: https://orcid.org/0000-0003-2598-0458)
- Zichen Fan (ORCID: https://orcid.org/0000-0002-8181-2996)
- Hun-Seok Kim (ORCID: https://orcid.org/0000-0002-6658-5502)
- David Blaauw (ORCID: https://orcid.org/0000-0001-6744-7075)
- Qirui Zhang (ORCID: https://orcid.org/0000-0001-8113-3558)
- Chien-Wei Tseng (ORCID: https://orcid.org/0009-0007-4280-2676)
- Pierre Abillama (ORCID: https://orcid.org/0000-0001-9523-6152)
- Wei Meng (ORCID: https://orcid.org/0000-0003-0209-8753)
- Jungho Lee (ORCID: https://orcid.org/0000-0003-4162-3389)
- Sara Shoori
Institutions
- University of Michigan (US)
Publication Details
- Published
- 2025-06-08
- DOI
- https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11075113
- Citations
- 1
- Primary Topic
- Advanced DC-DC Converters
- Type
- article
- Field-Weighted Citation Impact
- 0.73