Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP

We introduce Cygnus, an energy-efficient octa-core RISC-V vector processor compliant with the RVV 1.0 specification targeting digital signal processing (DSP) applications. This chiplet features dynamic instruction scheduling with short vector lengths at the vector core level and a big/little architecture with tightly-coupled memory at the SoC level, facilitating efficient streaming data flow across cores. Cygnus demonstrates a high average utilization of 90% across GEMM and CONV kernels, achieving leading energy efficiencies of 414 GOPS/W for INT8 GEMM and 109 GFLOPS/W for FP32 GEMM. In a representative computer vision kernel implementing denoising using a non-local means algorithm, the chiplet delivers a latency of 3.7 ms with an energy consumption of 518 μJ/ frame.

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Publication Details

Published
2025-06-08
DOI
https://doi.org/10.23919/vlsitechnologyandcir65189.2025.11075041
Citations
2
Primary Topic
Image Processing Techniques and Applications
Type
article
Field-Weighted Citation Impact
2.27
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article

Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP

Daniel Grubb, Yakun Sophia Shao, Jerry Zhao, Kevin Anderson et al.
2 citations
Image Processing Techniques and Applications
2.27
article

Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP

Daniel Grubb, Yakun Sophia Shao, Jerry Zhao, Kevin Anderson, Krste Asanović, Borivoje Nikolić, Yufeng Chi, Vikram Jain, Ella Schwarz, Ken Ho
article en
2 citations

Abstract

We introduce Cygnus, an energy-efficient octa-core RISC-V vector processor compliant with the RVV 1.0 specification targeting digital signal processing (DSP) applications. This chiplet features dynamic instruction scheduling with short vector lengths at the vector core level and a big/little architecture with tightly-coupled memory at the SoC level, facilitating efficient streaming data flow across cores. Cygnus demonstrates a high average utilization of 90% across GEMM and CONV kernels, achieving leading energy efficiencies of 414 GOPS/W for INT8 GEMM and 109 GFLOPS/W for FP32 GEMM. In a representative computer vision kernel implementing denoising using a non-local means algorithm, the chiplet delivers a latency of 3.7 ms with an energy consumption of 518 μJ/ frame.

University of California, Berkeley (US)
Affordable and clean energy
Openalex Percentile: Top 10%
Image Processing Techniques and Applications
2.27
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Cygnus: A 1 GHz Heterogeneous Octa-Core RISC-V Vector Processor for DSP — Daniel Grubb, Yakun Sophia Shao, et al. · (2025) | TGRS Research Map | TGRS