Thermally Stable Vertical-Stacked 1T1C FeRAM with Record 3.3 μF/cm² CMW Based on Unified Ferroelectric-Oxide Semiconductor Stack

We propose and demonstrate a novel 1T1C FeRAM with a unified ferroelectric-oxide semiconductor (FE-OS) stack, eliminating metal interconnects between capacitor and transistor. The 1T1C cell integrates a vertical transistor (<50 nm gate length) and capacitor with HfLaO-TiO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> stack, exhibits robust stability with endurance >10<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">7</sup> cycles and operate temperature up to 475 K, achieving a record 3.3 μF/cm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> capacitive memory window (CMW). The unified FE-OS stack design offers a simplified path for highly stable 3D-stackable memory applications.