Study on the Application and Reliability of High-k HfO<sub>2</sub>/ZrO<sub>2</sub> Superlattice Dielectrics in Ge Stacked Nanosheet GAAFET at 4K Ultra-Low Temperature
This study explores the potential application of HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>/ZrO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> superlattice (SL-HZO) in cryogenic CMOS technology. We fabricated HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>/ZO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf> with a thickness of 0.3nm per layer, and compared to conventional solid-solution Hf<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.5</inf>Zr<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0.</inf><inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</inf> O<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>(HZO) thin films, SL-HZO with mixed ferroelectric-antiferroelectric phases exhibited a high dielectric constant, stable capacitance, and excellent reliability. Furthermore, after integrating this 0.3nm SL-HZO material into germanium nanosheet gate-all-around field-effect transistors (Ge NS-GAAFET), cryogenic tests at 4K achieved a subthreshold swing of 28.7 mV/dec, an <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{I}_{\mathbf{on}}/\mathbf{I}_{\mathbf{off}}$</tex> ratio of <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$2.22 \times 10^{8}$</tex>, and a drain-induced barrier lowering (DIBL) of 8mV/V, demonstrating outstanding electrical performance. The results indicate that 0.3 nm SL-HZO holds significant potential for future high-performance computing applications (HPC).
Authors
- Fu-Ju Hou (ORCID: https://orcid.org/0000-0001-8288-2542)
- Guang-Li Luo (ORCID: https://orcid.org/0000-0001-9429-4342)
- Yi-Wen Lin (ORCID: https://orcid.org/0009-0002-5242-9362)
- Yung‐Chun Wu (ORCID: https://orcid.org/0000-0001-9409-6792)
- Chen-You Wei (ORCID: https://orcid.org/0009-0005-5563-9690)
- Kaiwei Huang
- T.H. Kao
Institutions
- Texas A&M University System (US)
- National Tsing Hua University (TW)
- Taiwan Semiconductor Manufacturing Company (Taiwan) (TW)
Publication Details
- Published
- 2025-06-08
- DOI
- https://doi.org/10.23919/snw65111.2025.11097215
- Citations
- 1
- Primary Topic
- Ferroelectric and Negative Capacitance Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.73