Investigation on Enhanced Hot Carrier Degradation in FinFETs at Cryogenic Temperature

In this paper, we investigate the enhanced hot carrier degradation (HCD) in FinFET at cryogenic temperatures. Under comparable stress condition, significantly enhanced <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{V}_{\mathbf{th}}$</tex> degradation than room temperature HCD is observed for cryogenic HCD, which can be successfully explained by three main factors: (a) Ge element migration from the drain migrates into the channel and reduce the band tail states under cryogenic HCD in pFinFET (b) Fermi levels moves closer to the band edge which increase the occupation of interface traps and amplify <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\boldsymbol{\Delta}\mathbf{V}_{\mathbf{th}}$</tex>. (c) The enhancement of ballistic transport results in more high energy carrier, consequently accelerating the interface trap generation rate. This work reveals the impacts of cryogenic physics on HCD and provides insights into the cryogenic reliability analysis.

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Published
2025-06-08
DOI
https://doi.org/10.23919/snw65111.2025.11097247
Primary Topic
Semiconductor materials and devices
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article
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article

Investigation on Enhanced Hot Carrier Degradation in FinFETs at Cryogenic Temperature

Runsheng Wang, Zixuan Sun, Yue‐Yang Liu, Hongbo Wang et al.
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Semiconductor materials and devices
article

Investigation on Enhanced Hot Carrier Degradation in FinFETs at Cryogenic Temperature

Runsheng Wang, Zixuan Sun, Yue‐Yang Liu, Hongbo Wang, Zuoyuan Dong, Zirui Wang, Xing Wu
article en

Abstract

In this paper, we investigate the enhanced hot carrier degradation (HCD) in FinFET at cryogenic temperatures. Under comparable stress condition, significantly enhanced <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\mathbf{V}_{\mathbf{th}}$</tex> degradation than room temperature HCD is observed for cryogenic HCD, which can be successfully explained by three main factors: (a) Ge element migration from the drain migrates into the channel and reduce the band tail states under cryogenic HCD in pFinFET (b) Fermi levels moves closer to the band edge which increase the occupation of interface traps and amplify <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$\boldsymbol{\Delta}\mathbf{V}_{\mathbf{th}}$</tex>. (c) The enhancement of ballistic transport results in more high energy carrier, consequently accelerating the interface trap generation rate. This work reveals the impacts of cryogenic physics on HCD and provides insights into the cryogenic reliability analysis.

Peking University (CN), Institute of Semiconductors (CN), East China Normal University (CN)
Openalex Percentile: Top 83%
Semiconductor materials and devices
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Investigation on Enhanced Hot Carrier Degradation in FinFETs at Cryogenic Temperature — Runsheng Wang, Zixuan Sun, et al. · (2025) | TGRS Research Map | TGRS