Learning with Fewer States: A Robust On-Chip Learning Algorithm Resilient to Conductance State Constraints in RRAM-Based Neural Networks
In this work, we propose a highly accurate and energy-efficient on-chip learning algorithm, which leverages the intrinsic variation in analog RRAM to overcome the non-convergence in conventional Manhattan weight update rules due to the limited intermediate RRAM states. The proposed learning approach achieves approximately a 15× improvement in classification accuracy despite the limited number (~20) of intermediate states available in RRAM cells. Our findings underscore the potential for reliable and efficient on-chip learning in RRAM-based neural network systems.
Authors
- Rui Hua Xie (ORCID: https://orcid.org/0000-0002-0177-4417)
- Jingwei Sun (ORCID: https://orcid.org/0000-0001-5098-1503)
- Zhixing Cai (ORCID: https://orcid.org/0000-0001-5689-9199)
- Ling Liang (ORCID: https://orcid.org/0000-0002-8534-6494)
- Zongwei Wang
- Zhizhen Yu (ORCID: https://orcid.org/0000-0001-8295-6310)
- Lin Bao (ORCID: https://orcid.org/0000-0002-3146-6124)
- Yimao Cai (ORCID: https://orcid.org/0000-0003-2961-9176)
- Zheng Zhou (ORCID: https://orcid.org/0009-0001-3981-6328)
- Zezhi Cheng
Institutions
- Peking University (CN)
Publication Details
- Published
- 2025-06-08
- DOI
- https://doi.org/10.23919/snw65111.2025.11097211
- Primary Topic
- Advanced Memory and Neural Computing
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China
- Structural Timber Innovation Company
- Beijing Municipal Science and Technology Commission
- Higher Education Discipline Innovation Project
- Beijing Nova Program