3-Bit D Flip-Flop Using 8 State QDC-SWS Inverters

This work introduces an innovative flip-flop circuit utilizing multi-state quantum dot gate FETs, quantum dot gate and quantum dot channel FETs, and quantum dot channel (QDC) spatial wavefunction-switched (SWS) field-effect transistors (FETs). The SWS-FET features two or more vertically stacked quantum-well or quantum dot (QD) layers, where the gate voltage controls carrier localization within each channel. By leveraging spatial positioning to encode multiple logic states and facilitating carrier transport through mini-energy bands in a GeOx-Ge/SiOx-Si quantum dot superlattice (QDSL), the design achieves 8-state operation. Built upon the 8-state inverter using QDC SWS-FETs in a CMOS-X configuration, this approach introduces a novel paradigm for developing advanced registers and sequential circuits. The proposed design enhances performance by minimizing the silicon footprint.

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Publication Details

Journal
International Journal of High Speed Electronics and Systems
Published
2025-07-30
DOI
https://doi.org/10.1142/s0129156426400227
Primary Topic
Advanced Memory and Neural Computing
Type
article
Field-Weighted Citation Impact
0.00
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article

3-Bit D Flip-Flop Using 8 State QDC-SWS Inverters

R. H. Gudlavalleti, B. Saman, F. Jain, E. Heller et al.
International Journal of High Speed Electronics and Systems
Advanced Memory and Neural Computing
article

3-Bit D Flip-Flop Using 8 State QDC-SWS Inverters

R. H. Gudlavalleti, B. Saman, F. Jain, E. Heller, A. Almalki, J. Chandy
article en

Abstract

This work introduces an innovative flip-flop circuit utilizing multi-state quantum dot gate FETs, quantum dot gate and quantum dot channel FETs, and quantum dot channel (QDC) spatial wavefunction-switched (SWS) field-effect transistors (FETs). The SWS-FET features two or more vertically stacked quantum-well or quantum dot (QD) layers, where the gate voltage controls carrier localization within each channel. By leveraging spatial positioning to encode multiple logic states and facilitating carrier transport through mini-energy bands in a GeOx-Ge/SiOx-Si quantum dot superlattice (QDSL), the design achieves 8-state operation. Built upon the 8-state inverter using QDC SWS-FETs in a CMOS-X configuration, this approach introduces a novel paradigm for developing advanced registers and sequential circuits. The proposed design enhances performance by minimizing the silicon footprint.

International Journal of High Speed Electronics and SystemsVol. 35(01)
University of Connecticut (US), Taif University (SA), Synopsys (United States) (US), Biorasis (United States) (US)
Openalex Percentile: Top 83%
Advanced Memory and Neural Computing
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