Asymmetric Space Vector Modulation With Positive and Negative DC-Bus Clamping: A Strategy for Enhanced THD and Efficiency

In this work, a modified two-stage T-type multilevel boost inverter and a DC-bus clamping-based asymmetric space vector modulation (ASVM) technique are proposed. In the conventional two-stage T-type multilevel boost inverters, the mid-point of the DC-link capacitors is taken as the neutral point (NP), whereas in the modified converter, the positive DC source terminal is taken as the NP. The modified structure helps in mitigating the NP voltage unbalancing and has the feature of reduced power processing. The pole voltages of the proposed converter include the input DC source and the boost converter’s output voltage with respect to the ground. Here, based on the duty cycle, the inverter pole voltage levels can be either symmetric or asymmetric; therefore, to utilize the asymmetric voltage levels an ASVM technique is proposed which is based on the positive and negative DC-bus clamping of each phase. This proposed ASVM technique also helps in minimizing the current THD and the switching loss of the converter. Further, the dependency of the output voltage on the DC-DC converter’s duty and inverter’s modulation index gives a feature to choose the converter’s operational point for minimum current THD and higher efficiency. A 1kW-rated prototype of the proposed converter is made and tested using the ASVM technique under different operating points. Further, a topological comparison with state-of-the-art multilevel inverters (MLIs) is provided across the key performance metrics of the proposed converter.