Ka-Band Two-Stage Low-Noise Amplifier with Low-Q Inductor Technique Using 28-nm FD-SOI CMOS Process for Beamforming Systems

In this study, we designed a Ka-band low-noise amplifier with a 28-nm FD-SOI CMOS process. It was designed with a single-ended two-stage structure, and a low Q-factor inductor and RC feedback structure were applied to suppress the oscillation. In addition, a common-source structure was used to secure the noise figure. The inductive source degeneration technique was applied to the first stage for noise matching. Additionally, an inductor and a resistor connected in series to the drain node of the first stage were used to secure the noise figure and expand the bandwidth. In the second stage, an RC feedback structure was applied between the gate and drain to secure stability. As a final result, in the operating frequency range of 29.1 GHz to 30.8 GHz, the gain and noise figure were 12.0-12.3 dB and 3.14-3.39 dB, respectively. The core size of the designed low-noise amplifier was 0.074 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.

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Published
2025-05-23
DOI
https://doi.org/10.1109/ecie65947.2025.11087059
Primary Topic
Radio Frequency Integrated Circuit Design
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article
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article

Ka-Band Two-Stage Low-Noise Amplifier with Low-Q Inductor Technique Using 28-nm FD-SOI CMOS Process for Beamforming Systems

Hyojin Yoon, Changkun Park, Jaeyong Lee, Chaeyun Kim
Radio Frequency Integrated Circuit Design
article

Ka-Band Two-Stage Low-Noise Amplifier with Low-Q Inductor Technique Using 28-nm FD-SOI CMOS Process for Beamforming Systems

Hyojin Yoon, Changkun Park, Jaeyong Lee, Chaeyun Kim
article en

Abstract

In this study, we designed a Ka-band low-noise amplifier with a 28-nm FD-SOI CMOS process. It was designed with a single-ended two-stage structure, and a low Q-factor inductor and RC feedback structure were applied to suppress the oscillation. In addition, a common-source structure was used to secure the noise figure. The inductive source degeneration technique was applied to the first stage for noise matching. Additionally, an inductor and a resistor connected in series to the drain node of the first stage were used to secure the noise figure and expand the bandwidth. In the second stage, an RC feedback structure was applied between the gate and drain to secure stability. As a final result, in the operating frequency range of 29.1 GHz to 30.8 GHz, the gain and noise figure were 12.0-12.3 dB and 3.14-3.39 dB, respectively. The core size of the designed low-noise amplifier was 0.074 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.

Soongsil University (KR)
Affordable and clean energy
Openalex Percentile: Top 83%
Radio Frequency Integrated Circuit Design
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Ka-Band Two-Stage Low-Noise Amplifier with Low-Q Inductor Technique Using 28-nm FD-SOI CMOS Process for Beamforming Systems — Hyojin Yoon, Changkun Park, et al. · (2025) | TGRS Research Map | TGRS