K-Band CMOS Voltage-Controlled Oscillator with Compact Size Using Dual-Core Structure
In this study, we design a CMOS voltage-controlled oscillator. For a wider frequency tuning range, the voltage-controlled oscillator is designed using a dual-core structure. A 1-bit switched capacitor bank and a varactor are implemented to enhance the frequency tuning range of each core. The dual-core voltage-controlled oscillator can be turned on or off by the supply voltage. In addition, a transformer-based signal output is employed to achieve a compact size while combining both cores into a single transformer. The voltage-controlled oscillator is designed using a 28-nm FD-SOI CMOS process. The operating frequency of the designed voltage-controlled oscillator ranges from 23.3 GHz to 29 GHz. The phase noise at a 1 MHz offset frequency ranges from −84.3 dBc/Hz to −89.6 dBc/Hz. The chip size including the pads is 0.74 × 0.69 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>, and the core size is 0.31 × 0.14 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>.
Authors
- Jaeyong Lee
- Joonseok Park (ORCID: https://orcid.org/0009-0005-4132-3353)
- Changkun Park
- Jinho Yoo (ORCID: https://orcid.org/0009-0002-3620-5123)
Institutions
- Soongsil University (KR)
Publication Details
- Published
- 2025-05-23
- DOI
- https://doi.org/10.1109/ecie65947.2025.11087078
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00