Quantitative Analysis of the Fault Ride-Through Current and Control Parameters in Hybrid Modular Multilevel Converters

A quantitative analysis of the fault transient is critical for system resilience assessment and protection coordination. Focusing on hybrid modular multilevel converter (MMC)-based HVDC architecture with enhanced fault ride-through (FRT) capability, this study develops a mathematical calculation framework to quantify how controller configurations influence fault current profiles. Unlike conventional static topologies (e.g., RLC or fixed-voltage RL circuits), the proposed model integrates an RL network with a time-variant controlled voltage source, which can emulate closed-loop control response during the FRT transient. Then, the quantitative relationship is established to map the parameters of DC controllers to the fault current across diverse FRT strategies, including scenarios where control saturation dominates the transient response. Simulation studies conducted on a two-terminal MMC-HVDC architecture substantiate the efficacy and precision of the developed methodology. The proposed method enables the evaluation of DC fault behavior for hybrid MMCs, concurrently appraising FRT control strategies.

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Publication Details

Journal
Applied Sciences
Published
2025-07-26
DOI
https://doi.org/10.3390/app15158331
Primary Topic
HVDC Systems and Fault Protection
Type
article
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article

Quantitative Analysis of the Fault Ride-Through Current and Control Parameters in Hybrid Modular Multilevel Converters

Bowen Tang, Yi Xu
Applied Sciences
HVDC Systems and Fault Protection
article

Quantitative Analysis of the Fault Ride-Through Current and Control Parameters in Hybrid Modular Multilevel Converters

Bowen Tang, Yi Xu
article en

Abstract

A quantitative analysis of the fault transient is critical for system resilience assessment and protection coordination. Focusing on hybrid modular multilevel converter (MMC)-based HVDC architecture with enhanced fault ride-through (FRT) capability, this study develops a mathematical calculation framework to quantify how controller configurations influence fault current profiles. Unlike conventional static topologies (e.g., RLC or fixed-voltage RL circuits), the proposed model integrates an RL network with a time-variant controlled voltage source, which can emulate closed-loop control response during the FRT transient. Then, the quantitative relationship is established to map the parameters of DC controllers to the fault current across diverse FRT strategies, including scenarios where control saturation dominates the transient response. Simulation studies conducted on a two-terminal MMC-HVDC architecture substantiate the efficacy and precision of the developed methodology. The proposed method enables the evaluation of DC fault behavior for hybrid MMCs, concurrently appraising FRT control strategies.

Applied SciencesVol. 15(15)
Hubei University of Technology (CN)
Openalex Percentile: Top 83%
HVDC Systems and Fault Protection
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