Micro-architecture design based on reconfigurable AMBA bus

With the development of large-scale integrated circuits, the structure of chips has become increasingly complex, and the system performance is closely related to the system architecture. An excellent system architecture design solution can achieve significant results in improving system performance. Therefore, the SoC (System on Chip) with good portability, short design cycle and low design cost has been widely used. However, high-performance CPUs will have higher requirements for the entire SoC system, such as higher operating frequencies, denser transmission and transmission, and more complex bus architectures. Therefore, this study focuses on the mainstream system bus architecture AMBA (Advanced Microcontroller Bus Architecture) as the research direction, and takes the RISC-V CPU under the self-developed C6 micro-architecture as the test platform. Combined with the characteristics of high-performance and low-power architecture, in under the premise of ensuring no loss of performance, the power consumption of the on-chip bus is reduced as much as possible, and on this basis, a reconfigurable architecture design of the bus is proposed, which can shorten the transmission cycle of the on-chip bus and reduce the occupancy of the bus.