Design of an improved high speed low overshoot charge pump circuit

An novel CMOS charge pump circuit for phase locked loop (PLL) and clock and data recovery circuit (CDR) is proposed. By the using of bypass capacitor technology, the overshoot current be great decreased, and the out voltage’s stability be great improved. The post HSPICE simulation result shows that: circuit can be worked properly under 2.5GHz, and with compared to the conventional charge pump circuit, the overshoot current decrease by 70%.the proposed charge pump circuit.