A 2.4GHz 676μW Receiver Front-End with Passive Analog FIR Filtering Embedded in Down-Converter Achieving >60dB Blocker Rejection

This paper presents a 2.4 GHz low-power receiver front-end that embeds passive analog finite impulse response (AFIR) filtering within the down-converter stage to enhance out-of-band blocker rejection. Distinct from conventional passive down-converters, the down-converted current is periodically conducted according to the FIR sequence and weight coefficients in each step, achieving analog FIR filtering after integration and sampling. The weight coefficients for each step-phase are precisely implemented by periodically time-varying passive switch arrays. The chip prototype, fabricated in a $28-\mathrm{nm}$ process, occupies an active area of $0.24 \mathrm{~mm}^{2}$. It attains a stop-band rejection exceeding 60 dB, with a transition band only four times the signal bandwidth. Owing to the passive AFIR introducing an out-of-band rejection characteristic without additional current consumption, the total power consumption of the proposed frontend is only $676 \mu \mathrm{~W}$ at a supply voltage of 0.65 V.