A 10 to 40 GHz Stacked Push-pull Class-B Power Amplifier in 45-nm CMOS SOI with 20.4 dBm P _SAT and Continuously Supporting 72 Gb/s 64-QAM and 10 Gb/s 1024-QAM Signals

This paper presents a broadband, high-efficiency stacked push-pull class-B power amplifier in $\mathbf{4 5 - n m}$ CMOS SOI that has a peak $P_{\text {SAT }}$ of 20.4 dBm and a maximum power-added efficiency of $40.2 \%$. Harmonic superposition of the drain-source current waveforms in a push-pull topology is utilized to enhance bandwidth (BW) and linearity while maintaining the same efficiency level as a regular Class-B PA. Equivalent circuits of tapered transmission lines, along with a low quality-factor inductive-resistive matching are used for broadband input and output matching of the PA. The PA achieves a very flat $P_{\text {sat }}$ with a record 1-dB BW of 30 GHz ($120 \%$) over 10 to 40 GHz. The PA has a peak small-signal gain of 13.8 dB with a $3-\mathrm{dB} \mathrm{BW}$ from 11.5 to 44.9 GHz. Furthermore, based on modulation tests, the proposed PA supports $10 \mathrm{~Gb} / \mathrm{s} 1024-\mathrm{QAM}$ and $6-72 \mathrm{~Gb} / \mathrm{s} 64-\mathrm{QAM}$ modulated signals. The DC power consumption is 182 mW, and the chip dimensions are $0.92 \mathrm{~mm} \times 2.1 \mathrm{~mm}$.