A K-band Process-Corner Robust Balanced Power Amplifier Utilizing Current-Mode Adaptive Biasing Network in 65-nm CMOS
This paper presents an adaptive biased K-band balanced power amplifier robust to process corner variations and featuring high modulation data rate with enhanced PAE at power back-off level. The proposed architecture, utilizing current-mode adaptive biasing network (ABN) with adjustable weight and a true power detector, offers a significant improvement in AM-AM distortion over process corner variation, from 5.6dB to 1.7dB, compared with conventional voltage-mode ABN. Fabricated in 65-nm CMOS technology, the measured OP1dB variation of the PA over multi-chips is only 0.5dB. With improved ABN bandwidth, the PA achieves a 4.8Gbps data rates when 256-QAM modulation is applied.
Authors
- Baoyong Chi (ORCID: https://orcid.org/0000-0003-4399-4423)
- Qiuyu Peng (ORCID: https://orcid.org/0009-0001-4887-6584)
- Xinzhong Duo
- Haikun Jia (ORCID: https://orcid.org/0000-0003-4564-8938)
- Zhan Gao (ORCID: https://orcid.org/0000-0002-8465-4292)
- Zhihua Wang (ORCID: https://orcid.org/0000-0003-3968-4465)
- Jinquan Zhao (ORCID: https://orcid.org/0009-0002-2489-4435)
- Wei Deng
Institutions
- Tsinghua University (CN)
Publication Details
- Published
- 2025-06-15
- DOI
- https://doi.org/10.1109/rfic61188.2025.11082896
- Citations
- 2
- Primary Topic
- Advanced Power Amplifier Design
- Type
- article
- Field-Weighted Citation Impact
- 1.46
Funders
- Beijing Innovation Center for Future Chip