A 22-nm CMOS 3.5-7.2 GHz Wideband FEM with a Balanced-Power-Combining DPA and a Dual-Resonant Input Matching LNA

This paper presents a $3.5-7.2 \mathrm{GHz}$ wideband front-end module (FEM) implemented in $22-\mathrm{nm}$ CMOS technology. The FEM consists of a digital power amplifier (DPA) and a low noise amplifier (LNA). The DPA utilizes a 4-way balanced-power-combining (BPC) network with electrical coupling compensation to minimize broadband amplitude modulation (AM) and phase modulation (PM) mismatches among the four sub-arrays. To improve efficiency and linearity, an AM-PM distortion-canceling power cell is developed. The LNA employs a dual-resonant input matching (DRIM) approach to achieve wideband input impedance and noise matching. The DPA achieves a peak output power of $\mathbf{3 0. 0 8 ~ d B m}$ with a drain efficiency of $43.31 \%$ at 6 GHz. For a 40 MHz 256 -QAM signal, the average output power ($\mathrm{P}_{\text {avg }}$) is 19.09, 21.07 and 17.18 dBm at 4.5, 6, and 7.2 GHz, respectively, with average drain efficiency ($\mathrm{DE}_{\text {avg }}$) of $\mathbf{2 0. 3 9 \%, ~ 2 0. 6 \%}$ and 18.5%. For a $\mathbf{2 0 ~ M H z}$ 1024-QAM signal, the $P_{\text {avg }}$ is $16.7,18.25$ and 17.55 dBm at $4.5,6$ and 7.2 GHz with $\mathrm{DE}_{\text {avg }}$ of $18.22 \%, 18.41 \%$ and $16.53 \%$, respectively. The LNA achieves a peak $S 21$ of 18.8 dB at 6 GHz, with the noise figure (NF) of $\mathbf{1. 7 ~ d B}$ and S11 and S22 below -10 dB across the 3.5-7.2 $\mathbf{G H z}$ range.