UTMI-Based Clock Calibration Method

This paper proposes a UTMI (Universal Transceiver Macro Interface)-based clock calibration method to address the clock frequency error in the UTMI physical layer under high-speed scenarios. By detecting the SYNC field of the SOF (Start of Frame) packet to recover the reference clock signal, combined with duty cycle calculation and a binary capacitor array adjustment mechanism, precise compensation for clock phase delay is achieved. This ensures a duty cycle close to 50%, thereby reducing errors and meeting USB protocol requirements. Experimental results demonstrate that the proposed method controls duty cycle errors within $\pm 5 \%$, effectively mitigates the impact of PVT (Process, Voltage, Temperature) factors on clock stability, and satisfies the USB protocol’s frequency error tolerance of ± 500ppm.

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Publication Details

Published
2025-05-23
DOI
https://doi.org/10.1109/eeiss65394.2025.11085655
Primary Topic
Advancements in PLL and VCO Technologies
Type
article
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article

UTMI-Based Clock Calibration Method

Zongyuan Ge, Harry de Man, Yulong Zhou, Linlin Yang et al.
Advancements in PLL and VCO Technologies
article

UTMI-Based Clock Calibration Method

Zongyuan Ge, Harry de Man, Yulong Zhou, Linlin Yang, Xukun Zhuang
article en

Abstract

This paper proposes a UTMI (Universal Transceiver Macro Interface)-based clock calibration method to address the clock frequency error in the UTMI physical layer under high-speed scenarios. By detecting the SYNC field of the SOF (Start of Frame) packet to recover the reference clock signal, combined with duty cycle calculation and a binary capacitor array adjustment mechanism, precise compensation for clock phase delay is achieved. This ensures a duty cycle close to 50%, thereby reducing errors and meeting USB protocol requirements. Experimental results demonstrate that the proposed method controls duty cycle errors within $\pm 5 \%$, effectively mitigates the impact of PVT (Process, Voltage, Temperature) factors on clock stability, and satisfies the USB protocol’s frequency error tolerance of ± 500ppm.

Cloud Computing Center (CN), Xiamen University of Technology (CN)
Openalex Percentile: Top 84%
Advancements in PLL and VCO Technologies
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