An 8-element 800MHz BW 0.083mm<sup>2</sup>/element Scalable Current-Mode True-Time-Delay Analog Combiner for Low SWaP-C Antenna Arrays
This paper presents a scalable current-mode true time delay (CMTTD) analog baseband combiner for large antenna arrays. The proposed combiner uses current-mode signal addition and alleviates the scalability-bandwidth trade-off in the state-of-the-art (SOTA) switched-capacitor-based combiners. An improved current-mode sample-and-hold (CSH) cell using a replica branch is proposed for wideband operation. A constant-slope-based phase interpolator (PI) generates programmable clock phases for signals from different antenna elements. The CMTTD IC is prototyped in 65 nm CMOS technology and supports 8 antenna elements with up to 800 MHz signal bandwidth. The combiner achieves a measured delay resolution of 4.59 ps, signal-to-noise-and-distortion (SINAD) ratio of 41.1 dB, and 37.3 dB at signal frequencies of 200 MHz and 800 MHz respectively, and EVM of -20.35 dB for 16QAM signal at $1.652 \mathrm{~Gb} / \mathrm{s}$ data rate. The IC occupies an active area of 0.083 $\mathrm{mm}^{2}$ per antenna element while consuming 7.5 mW DC power per antenna element from a 1 V supply.
Authors
- Sreeni Poolakkal (ORCID: https://orcid.org/0000-0003-4532-559X)
- Ajinkya Kharalkar (ORCID: https://orcid.org/0000-0003-4286-087X)
- Sumit Khalapure (ORCID: https://orcid.org/0000-0002-4114-0777)
- Subhanshu Gupta (ORCID: https://orcid.org/0000-0003-4754-3451)
- Soumen Mohapatra (ORCID: https://orcid.org/0000-0002-7302-5562)
- Shubham Jain (ORCID: https://orcid.org/0000-0003-4451-6749)
- Rajesh Zele
- Paavan Gouniyal
Institutions
- Indian Institute of Technology Bombay (IN)
- Washington State University (US)
Publication Details
- Published
- 2025-06-15
- DOI
- https://doi.org/10.1109/rfic61188.2025.11082954
- Primary Topic
- Radio Frequency Integrated Circuit Design
- Type
- article
- Field-Weighted Citation Impact
- 0.00