Design and Implementation of a 4-Bit Carry Select Adder using MTCMOS-Based Ripple Carry Adder with 10T Full Adders in 90nm Technology

Recent advances in CSA design have targeted speed enhancement and power reduction. Current models are plagued by heavy area overhead and power loss owing to dual RCAs. We introduce a new CSA architecture employing a 4-bit RCA composed of MTCMOS-enhanced 10T Full Adders in this paper. Our design, when applied and analyzed in 90nm technology employing Cadence, realizes a reduction of 27.5% in power usage, an increase of 23.7% in delay improvement, and an area reduction of 19.2% from traditional CSA design. These performances validate the practicality of our method for high-performance, low-power VLSI applications.