Automatic Dual Threshold Tuning for Switch Buffer Sharing in Datacenter Networking

For the widely deployed on-chip shared buffer, efficient buffer management is the key to absorbing bursts and avoiding packet loss during transient congestion. However, as the buffer-per-port-per-Gbps in production data centers decreases, it becomes more challenging to provide efficient buffer management to meet the requirements of heterogeneous traffic. We observe that typical shared buffer management policies have two steps: first, they identify short flows arriving at ports and then allocate more buffer room for these ports. Unfortunately, the lack of isolation between long and short flows leads to increased queue buildup and even packet loss of short flows. To address this limitation, we propose D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T, which uses different queue length thresholds for long and short flows. Specifically, we first design a compact data structure to distinguish between long and short flows. Then when two kinds of flows coexist at the same port, the threshold of long flows will decrease to absorb the bursty short flows. What’s more, we introduce D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${}^{*}$</tex-math> </inline-formula> which combines D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T with advanced DRL techniques to move toward mastering buffer management for further improving performance across various scenarios. We implement D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T at a P4-programmable switch and large-scale simulations. The results demonstrate that D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T reduces both average and tail flow completion times (FCT) of short flows by up to 29% and 62% compared with the state-of-the-art policies, respectively.

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Publication Details

Journal
IEEE Transactions on Networking
Published
2025-07-24
DOI
https://doi.org/10.1109/ton.2025.3590965
Primary Topic
Interconnection Networks and Systems
Type
article
Field-Weighted Citation Impact
0.00

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article

Automatic Dual Threshold Tuning for Switch Buffer Sharing in Datacenter Networking

Ping Zhong, Jiawei Huang, Zhaoyi Li, Wanchun Jiang et al.
IEEE Transactions on Networking
Interconnection Networks and Systems
article

Automatic Dual Threshold Tuning for Switch Buffer Sharing in Datacenter Networking

Ping Zhong, Jiawei Huang, Zhaoyi Li, Wanchun Jiang, Pingping Dong, Wensheng Tang, Hui Li, Jingling Liu, Boyen Huang, Yong Cui, Jianxin Wang
article en

Abstract

For the widely deployed on-chip shared buffer, efficient buffer management is the key to absorbing bursts and avoiding packet loss during transient congestion. However, as the buffer-per-port-per-Gbps in production data centers decreases, it becomes more challenging to provide efficient buffer management to meet the requirements of heterogeneous traffic. We observe that typical shared buffer management policies have two steps: first, they identify short flows arriving at ports and then allocate more buffer room for these ports. Unfortunately, the lack of isolation between long and short flows leads to increased queue buildup and even packet loss of short flows. To address this limitation, we propose D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T, which uses different queue length thresholds for long and short flows. Specifically, we first design a compact data structure to distinguish between long and short flows. Then when two kinds of flows coexist at the same port, the threshold of long flows will decrease to absorb the bursty short flows. What’s more, we introduce D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${}^{*}$</tex-math> </inline-formula> which combines D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T with advanced DRL techniques to move toward mastering buffer management for further improving performance across various scenarios. We implement D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T at a P4-programmable switch and large-scale simulations. The results demonstrate that D<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup>T reduces both average and tail flow completion times (FCT) of short flows by up to 29% and 62% compared with the state-of-the-art policies, respectively.

IEEE Transactions on NetworkingVol. 33(6)
Central South University (CN), Hunan Normal University (CN), Tsinghua University (CN)
National Natural Science Foundation of China, Natural Science Foundation of Hainan Province
Affordable and clean energy
Openalex Percentile: Top 80%
Interconnection Networks and Systems
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