High-Precision Low-Latency Method and Architecture for Computing Binary and Decimal Logarithms
Binary and decimal logarithms (BDLs) are commonly used in science and engineering. This brief presents a theory of the radix-4 generalized hyperbolic coordinate rotation digital computer (GH-CORDIC) to compute them directly. Compared with traditional hyperbolic CORDIC (TH-CORDIC), the two logarithms can be calculated without extra dividers or multipliers. Compared with the GH-CORDIC, this theory has low iterations under the same high precision. Through theoretical derivation and software simulation, we can find that the calculation accuracy can reach the magnitude of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$10^{-7}$</tex-math> </inline-formula>, and the number of iterations can be reduced by more than 50%. Through hardware implementation, the synthesis report shows that the proposed architecture can save 53.44% area and 46.36% power consumption compared with the latest radix-2 GH-CORDIC method.
Authors
- Weiqiang Liu (ORCID: https://orcid.org/0000-0001-8398-8648)
- Lianghua Quan (ORCID: https://orcid.org/0000-0001-7073-7743)
- Zhonghai Lu (ORCID: https://orcid.org/0000-0003-0061-3475)
- Hui Chen (ORCID: https://orcid.org/0000-0001-5462-8029)
Institutions
- Nanjing University of Aeronautics and Astronautics (CN)
Publication Details
- Journal
- IEEE Transactions on Very Large Scale Integration (VLSI) Systems
- Published
- 2025-07-24
- DOI
- https://doi.org/10.1109/tvlsi.2025.3590597
- Primary Topic
- Digital Filter Design and Implementation
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- National Natural Science Foundation of China