FIFO: Fuzzy Cluster Identification and High-dimensional Feature Clustering Optimization Based CPU Power Sampling Optimization

The high accuracy of processor power consumption modeling has consistently posed challenges in processor design and program power optimization. With the increasing complexity of processor architectures and the diversification of application types, enhancing the accuracy of processor power models has become increasingly difficult. In addition to model selection and feature selection for modeling parameters, the quantity and distribution of training set samples significantly affect the improvement of processor model accuracy. To reduce model complexity, high-dimensional feature spaces are often subjected to dimensionality reduction. However, this can sometimes lead to bias in sample point clustering within the feature space (fuzzy clustering), thereby impacting the accuracy of processor power models. Addressing this issue, this paper proposes a novel method called "FIFO: Fuzzy Cluster Identification and Feature Optimization for Processor Power Modeling Sample Optimization". The FIFO algorithm optimizes the distribution of training sample points for processor power models by implementing fuzzy cluster identification in low-dimensional feature space (FI), high-dimensional feature space restoration and clustering optimization (FO), and redundant point elimination based on mixed-dimension feature spaces, thereby enhancing the accuracy of processor modeling. Validation of the FIFO algorithm’s effectiveness was conducted through linear power modeling and neural network power modeling on both x86 and ARM processor platforms. Experimental results demonstrate that employing the FIFO algorithm reduces processor power model errors by an average of 13.69% on an ARMv8-based architecture processor platform, by 15.76% on the Intel Xeon Gold-6226R processor platform, and by 25.41% on the Intel Xeon E5-2660 processor platform.

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Published
2024-12-13
DOI
https://doi.org/10.1109/hpcc64274.2024.00049
Primary Topic
Machine Learning and ELM
Type
article
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article

FIFO: Fuzzy Cluster Identification and High-dimensional Feature Clustering Optimization Based CPU Power Sampling Optimization

Xianyu Wu, Shaojun Feng, Yichang Zhou, Zihan Zhang et al.
Machine Learning and ELM
article

FIFO: Fuzzy Cluster Identification and High-dimensional Feature Clustering Optimization Based CPU Power Sampling Optimization

Xianyu Wu, Shaojun Feng, Yichang Zhou, Zihan Zhang, Zhaoyang Ma, Juan Chen, Jiaqing Zhong, Mingyuan Zhang, Rongyu Deng
article en

Abstract

The high accuracy of processor power consumption modeling has consistently posed challenges in processor design and program power optimization. With the increasing complexity of processor architectures and the diversification of application types, enhancing the accuracy of processor power models has become increasingly difficult. In addition to model selection and feature selection for modeling parameters, the quantity and distribution of training set samples significantly affect the improvement of processor model accuracy. To reduce model complexity, high-dimensional feature spaces are often subjected to dimensionality reduction. However, this can sometimes lead to bias in sample point clustering within the feature space (fuzzy clustering), thereby impacting the accuracy of processor power models. Addressing this issue, this paper proposes a novel method called "FIFO: Fuzzy Cluster Identification and Feature Optimization for Processor Power Modeling Sample Optimization". The FIFO algorithm optimizes the distribution of training sample points for processor power models by implementing fuzzy cluster identification in low-dimensional feature space (FI), high-dimensional feature space restoration and clustering optimization (FO), and redundant point elimination based on mixed-dimension feature spaces, thereby enhancing the accuracy of processor modeling. Validation of the FIFO algorithm’s effectiveness was conducted through linear power modeling and neural network power modeling on both x86 and ARM processor platforms. Experimental results demonstrate that employing the FIFO algorithm reduces processor power model errors by an average of 13.69% on an ARMv8-based architecture processor platform, by 15.76% on the Intel Xeon Gold-6226R processor platform, and by 25.41% on the Intel Xeon E5-2660 processor platform.

National University of Defense Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 72%
Machine Learning and ELM
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