The Dynamics of a Frequency Synthesizer With a Phase-Frequency Detector

This article examines the dynamics of a frequency synthesizer based on a pulsed phase-locked loop (PLL) with a phase-frequency detector (PFD). On the basis of the published methodology for calculating a system with a low-pass filter (LPF) of the 2nd order we derive expressions relating the initial frequency detuning and the frequency transition time for cases where the other filters are used: of the 3rd order and proportional-integrating. Next, the corresponding dependency graphs, when changing various device parameters, are plotted. Synthesizer models are also being designed to compare the transition time obtained during the modeling process with the result of a theoretical calculation.