Iteration Overlap and Dual-Sided LSOVA for Efficient Parallel Turbo Decoding Architectures

An efficient turbo decoder architecture is proposed by jointly exploring advancements in code design, decoding algorithms, and hardware implementation to achieve high-throughput and low-latency performance. At the algorithmic level, we introduce Dual-Sided Local-SOVA (DS-LSOVA), an enhanced variant of Local-SOVA that significantly lowers the complexity of extrinsic information computation while preserving decoding accuracy. To further improve implementation efficiency, iteration overlap interleavers are developed specifically for fully pipelined, iteration-unrolled UXMAP decoders, enabling full iteration overlap. This design reduces decoding latency and boosts hardware area efficiency by up to 22%. Importantly, these gains are achieved without sacrificing error-correcting performance: DS-LSOVA matches the Frame Error Rate (FER) of conventional max-Log-MAP decoding, while the proposed interleavers deliver FER results comparable to the Quadratic Permutation Polynomial (QPP) interleavers used in LTE.

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Publication Details

Journal
IEEE Access
Published
2025-01-01
DOI
https://doi.org/10.1109/access.2025.3590986
Primary Topic
Advanced Wireless Communication Techniques
Type
article
Field-Weighted Citation Impact
0.00

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article

Iteration Overlap and Dual-Sided LSOVA for Efficient Parallel Turbo Decoding Architectures

Stefan Weithoffer, Charbel Abdel Nour
IEEE Access
Advanced Wireless Communication Techniques
article

Iteration Overlap and Dual-Sided LSOVA for Efficient Parallel Turbo Decoding Architectures

Stefan Weithoffer, Charbel Abdel Nour
article en

Abstract

An efficient turbo decoder architecture is proposed by jointly exploring advancements in code design, decoding algorithms, and hardware implementation to achieve high-throughput and low-latency performance. At the algorithmic level, we introduce Dual-Sided Local-SOVA (DS-LSOVA), an enhanced variant of Local-SOVA that significantly lowers the complexity of extrinsic information computation while preserving decoding accuracy. To further improve implementation efficiency, iteration overlap interleavers are developed specifically for fully pipelined, iteration-unrolled UXMAP decoders, enabling full iteration overlap. This design reduces decoding latency and boosts hardware area efficiency by up to 22%. Importantly, these gains are achieved without sacrificing error-correcting performance: DS-LSOVA matches the Frame Error Rate (FER) of conventional max-Log-MAP decoding, while the proposed interleavers deliver FER results comparable to the Quadratic Permutation Polynomial (QPP) interleavers used in LTE.

IEEE AccessVol. 13
Centre National de la Recherche Scientifique (FR), Université de Bretagne Occidentale (FR), Laboratoire des Sciences et Techniques de l’Information de la Communication et de la Connaissance (FR), IMT Atlantique (FR)
Agence Nationale de la Recherche
Affordable and clean energy
Openalex Percentile: Top 84%
Advanced Wireless Communication Techniques
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