Self-Protection Circuits Against Radiation-Induced Faults in a Network on Chip

This work presents a system capable of proactively removing radiation-induced failures. We tested our solution with two levels of hybridization described in hardware and simulated in a Field Programmable Gate Array (FPGA) and tested it on a large scale with the software-level simulator booksim. We found it possible to extend the lifetime of network-on-a-chip (NoC) components in radiative environments, while adjusting to different radiation levels. With our solution, we can increase the resilience to failures of satellites and ground based critical systems and pave the way for future high-performance, high-resilience data servers in space. Specifically, radiation resilient NoCs will enable scalability with low power consumption and low area utilization, and, when utilized as chiplet interconnects, low costs.