SAFFIRA A Framework for Assessing the Reliability of Systolic-Array DNN Accelerators
Systolic array has emerged as a prominent architecture for Deep Neural Network (DNN) hardware accelerators, providing high-throughput and low-latency performance essential for deploying DNNs across diverse applications. However, when used in safety-critical applications, reliability assessment is mandatory to guarantee the correct behavior of DNN accelerators. While fault injection stands out as a well-established practical and robust method for reliability assessment, it is still a very time-consuming process. This paper addresses the time efficiency issue by introducing a novel hierarchical software-based hardware-aware fault injection strategy tailored for systolic array-based DNN accelerators. A Uniform Recurrent Equations system is used for software modeling of the systolic-array core of the DNN accelerators. The approach demonstrates a reduction of the fault injection time up to [Formula: see text] compared to the state-of-the-art hybrid (software/hardware) hardware-aware fault injection frameworks and more than [Formula: see text] compared to RT-level fault injection frameworks without compromising the accuracy from the application level. Additionally, we introduce novel reliability metrics to better evaluate the robustness of a deep neural network system. The performance of the framework is studied on state-of-the-art DNN benchmarks.
Authors
- Jaan Raik (ORCID: https://orcid.org/0000-0001-8113-020X)
- Salvatore Pappalardo
- Nicolò Bellarmino (ORCID: https://orcid.org/0000-0001-5887-2598)
- Maksim Jenihhin (ORCID: https://orcid.org/0000-0001-8165-9592)
- Masoud Daneshtalab (ORCID: https://orcid.org/0000-0001-6289-1521)
- Alberto Bosio (ORCID: https://orcid.org/0000-0001-6116-7339)
- Bastien Deveautour (ORCID: https://orcid.org/0000-0003-1055-2696)
Institutions
- Université Claude Bernard Lyon 1 (FR)
- Tallinn University of Technology (EE)
- École Centrale de Lyon (FR)
- Centre National de la Recherche Scientifique (FR)
- Politecnico di Torino (IT)
- Institut des Nanotechnologies de Lyon (FR)
- Institut d'Électronique et des Technologies du numéRique (FR)
- Mälardalen University (SE)
- Institut National des Sciences Appliquées de Lyon (FR)
- Brandenburg University of Technology Cottbus-Senftenberg (DE)
- Nantes Université (FR)
Publication Details
- Journal
- Journal of Circuits Systems and Computers
- Published
- 2025-07-16
- DOI
- https://doi.org/10.1142/s0218126625430017
- Primary Topic
- Particle Detector Development and Performance
- Type
- article
- Field-Weighted Citation Impact
- 0.00