Implementation of Deep Neural Networks on FPGAs and Reconfigurable Edge Computing Devices

This paper explore the integration of DNNs with FPGAs and other reconfigurable edge computing devices that are of low cost, to further advance the goals of real-time inferences with minimal computational overhead. Deploying DNNs at the network edge would realize the full benefits from distributed computing and edge intelligence. A review of existing literature emphasizes the need for scalability methods in deploying complex models within resource-constrained environments. We propose the optimization of DNN architectures for FPGAs, focusing on hardware limitations, energy efficiency, and speed of inference. Experimental results demonstrate the improved performance and better resource utilization of our approach compared to the conventional methods. This research will contribute toward edge computing by showing FPGA-based DNN implementations that can enable high-speed, low-latency solutions for IoT, autonomous systems, and embedded AI applications.