Advanced Fault Diagnosis of CMOS Circuit Design by Leakage Measurement in Nanometer Technology
With the continuous scaling of Complementary Metal-Oxide-Semiconductor (CMOS) towards the nanometer technology, the susceptibility of integrated circuits to manufacturing defects and operational faults has dramatically increased. Faults such as stuck-open and stuck-on are among the most critical, as they degrade performance, increase power consumption, and reduce the reliability of the circuit. This research presents a creative approach for CMOS fault detection. Leveraging leakage current analysis as a non-invasive and highly sensitive technique, the method enables the identification of faults at the transistor level. Sometimes, such faults cannot be detected by logic testing and are detected only after production when it is already too late. In comparison to logic testing, the proposed methodology also enhances controllability and observability, making it a valuable approach for fault detection and analysis in CMOS circuits
Authors
- Vijayaprabhuvel Rajavel
- Reyansh Gahlot
Institutions
- Thapar Institute of Engineering & Technology (IN)
Publication Details
- Published
- 2025-05-23
- DOI
- https://doi.org/10.1109/vlsisata65374.2025.11070065
- Citations
- 2
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 1.46