Performance Analysis of Hetero-Material Junctionless Tunnel Field Effect Transistor (HM - JLTFET) for Low-Power Electronic Applications

This paper introduces a hetero-material junctionless tunnel field-effect transistor (HM-JLTFET) with a low work function InAs as the source and GaAs as the channel and drain for enhanced electrostatic control. A high-k dielectric layer and a carefully chosen doping profile are employed to provide enhanced carrier tunneling for enhanced switching performance and minimized leakage current. In comparison with an equivalent-sized conventional TFET, simulated results demonstrate that the HM-JLTFET minimizes leakage, dissipates less power, and has a higher I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">ON</inf>/I<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">OFF</inf> ratio, enhanced subthreshold slope (SS), and enhanced switching at lower gate voltages. The hetero-material structure coupled with junctionless operation guarantees enhanced energy efficiency, and the HM-JLTFET is a promising device for future low-power electronics. The hetero-material junctionless tunnel field-effect transistor (HM-JLTFET) is a new transistor structure that benefits from both hetero-materials and junctionless operation.