On-Chip 1 TOPS Hyperdimensional Photonic Tensor Core Using a WDM Silicon Photonic Coherent Crossbar

We demonstrate an on-chip 0.96 TOPS hyperdimensional photonic tensor core by utilizing a time-space-wavelength multiplexed silicon photonic Crossbar (Xbar). The novel architecture relies on serializing the large matrix-vector or tensor-vector products by unfolding multiply and accumulation operations over the time domain, while simultaneously distributing the computational workload over different spatial and wavelength channels. We experimentally demonstrate the operation of a 4-channel 2-input time-space-wavelength division multiplexing (TSWDM) Xbar that incorporates 56 GHz electro-absorption modulators (EAMs) and 4-channel integrated multiplexing stages. Its successful operation as a 4×2×1 tensor-vector multiplication unit demonstrated an average relative error of 3.9%. Its performance as a photonic AI accelerator was also evaluated in the classification task of the Iris dataset, presenting experimental accuracies of 93.3% at data rates between 4×10 and 4×30 GBd, reaching 83.3% when the data rate increases to 4×60 GBd. Finally, we discuss the TSWDM Xbar scalability potential, revealing that the inclusion of a wavelength division multiplexing (WDM) scheme in the space division multiplexing (SDM) architecture reduces the operating laser power, feasibly boosting the potential of constructing photonic accelerators with computational throughput in the POPS regime.