Resource Efficient FPGA Implementation of SGM Stereo Disparity for a Planetary Rover

Autonomous navigation of rovers on the Lunar South Pole is necessitated due to intermittent communication via relay satellites, signal propagation delays, and limited bandwidth for teleoperation. Such autonomous operations may be divided into 4 connected processes: perception, localization, mapping, and control. All these 4 processes must be performed onboard with a minimal computing and electrical power budget. Modern CMOS camera sensors are well suited for perception under significant power and mass restrictions but require a lot of computational resources. For a robotic rover autonomy, it is necessary that perception process implements 3D sensing of the environment. Stereo perception using a pair of cameras is the minimal solution to achieve this goal using traditional Computer Vision (CV) techniques. The Machine-Learning based approaches are not yet robust, accurate, and/or verifiable enough to rely on in high impact space missions. Hence, in this paper we focus on the narrow problem of implementing and deploying Semi-Global Matching (SGM) disparity algorithm from classic CV due to its combination of accuracy and computational performance. Due to the limited electrical power availability onboard the solar-powered rover, the SGM algorithm is implemented on a power-efficient System-on-Chip which includes a quad-core RISC-V processor and FPGA resources. Due to computational constraints, the entirety of SGM is implemented on FPGA fabric. The algorithm had to be re-implemented manually using System Verilog Hardware Description Language (HDL) without using of any High-Level Synthesis (HLS) tools for the algorithm itself or any other developer-friendly solutions since they either generate inefficient code or code that requires significantly more FPGA fabric resources than available on our target platform. We explain the algorithm design and implementation and compare the results with HLS-generated code implementation.