Design of a Multi-Channel Parallel Data Acquisition System Based on FPGA
To meet the high-synchronization requirements of multi-channel data acquisition in shallow-water imaging sonar systems, this study designs a 128-channel parallel acquisition system based on an FPGA. The system integrates a Xilinx Zynq-7000 FPGA and 64 LTC1407A-1 dual-channel 14-bit ADCs, achieving precise synchronization through Verilog programming. A three-level buffering structure ensures data reliability and real-time performance. Experimental results confirm the system’s ability to efficiently acquire synchronized data from 128 channels, providing a reliable solution for sonar applications.
Authors
- Dongdong Peng (ORCID: https://orcid.org/0000-0002-3211-792X)
- Yu Luo (ORCID: https://orcid.org/0000-0001-7488-7028)
- Tao Fan (ORCID: https://orcid.org/0000-0002-6097-2413)
Institutions
- Shandong University of Science and Technology (CN)
Publication Details
- Published
- 2025-05-09
- DOI
- https://doi.org/10.1109/cisce65916.2025.11065414
- Citations
- 1
- Primary Topic
- Embedded Systems and FPGA Design
- Type
- article
- Field-Weighted Citation Impact
- 1.21