Test Accuracy Improvement of Ensemble Gaussian Process-based IC Outlier Detection Using Temporal Similarity Among Wafers

The IC outlier detection method, which compares measured and predicted characteristics by ensemble learning with Gaussian processes (EGPR), drastically improves IC test accuracy compared to existing statistical methods. However, detecting faulty chips at the edge of a wafer is still challenging because they exhibit different characteristic trends than others. Moreover, test accuracy degrades when fault clusters exist on a wafer, because the prediction accuracy inevitably degrades due to the effects of faulty chips. In this study, we improve the test accuracy of the EGPR-based method by averaging measurements with values from adjacent wafers, leveraging the similarity in characteristics within the same lot. Experimental results using industrial IC test results indicate that the proposed method reduces test escapes by 6.40% compared to the conventional EGPR-based method while maintaining computation time. We also demonstrate that the proposed method improves the fault detection rate by 27.9% using an artificial dataset with a fault cluster.

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Published
2025-03-24
DOI
https://doi.org/10.1109/icmts63811.2025.11068929
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
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article
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article

Test Accuracy Improvement of Ensemble Gaussian Process-based IC Outlier Detection Using Temporal Similarity Among Wafers

Hajime Takayama, Makoto Eiki, Takashi Satō, Masuo Kajiyama et al.
Integrated Circuits and Semiconductor Failure Analysis
article

Test Accuracy Improvement of Ensemble Gaussian Process-based IC Outlier Detection Using Temporal Similarity Among Wafers

Hajime Takayama, Makoto Eiki, Takashi Satō, Masuo Kajiyama, Tomoki Nakamura, Michihiro Shintani, Daisuke Goeda
article en

Abstract

The IC outlier detection method, which compares measured and predicted characteristics by ensemble learning with Gaussian processes (EGPR), drastically improves IC test accuracy compared to existing statistical methods. However, detecting faulty chips at the edge of a wafer is still challenging because they exhibit different characteristic trends than others. Moreover, test accuracy degrades when fault clusters exist on a wafer, because the prediction accuracy inevitably degrades due to the effects of faulty chips. In this study, we improve the test accuracy of the EGPR-based method by averaging measurements with values from adjacent wafers, leveraging the similarity in characteristics within the same lot. Experimental results using industrial IC test results indicate that the proposed method reduces test escapes by 6.40% compared to the conventional EGPR-based method while maintaining computation time. We also demonstrate that the proposed method improves the fault detection rate by 27.9% using an artificial dataset with a fault cluster.

Sony (Taiwan) (TW), Kyoto University (JP), Kyoto Institute of Technology (JP)
Openalex Percentile: Top 85%
Integrated Circuits and Semiconductor Failure Analysis
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