Contention-Aware GPU Thread Block Scheduler for Efficient GPU-SSD
The growing dataset sizes in LLM have made low-cost SSDs a popular solution for extending GPU memory in mobile devices. In this paper, we introduce <monospace xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CA-Scheduler</monospace>, a contention-aware scheduling scheme for GPU-initiated SSD access. The key insight behind <monospace xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CA-Scheduler</monospace> is leveraging the BSP GPU programming model, which allows reordering work at the thread block level to optimize SSD throughput. By capitalizing on the predictable memory access patterns of GPU thread blocks, <monospace xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CA-Scheduler</monospace> anticipates SSD locations to minimize contention and improve performance.
Authors
- Hyesoon Kim (ORCID: https://orcid.org/0000-0002-6061-7825)
- Seonjin Na (ORCID: https://orcid.org/0009-0009-0734-8126)
- Edward Chung (ORCID: https://orcid.org/0000-0001-6969-7764)
- Jiashen Cao (ORCID: https://orcid.org/0000-0002-0079-2146)
- Jing Yang (ORCID: https://orcid.org/0009-0000-0157-5971)
- Xueyang Liu (ORCID: https://orcid.org/0009-0005-4063-9938)
Institutions
- Georgia Institute of Technology (US)
- Samsung (United States) (US)
Publication Details
- Journal
- IEEE Computer Architecture Letters
- Published
- 2025-07-01
- DOI
- https://doi.org/10.1109/lca.2025.3586312
- Primary Topic
- Advanced Data Storage Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00